1 ps8553 08/10/01 description the PI5A4599A is an improved, direct replacement for the max4599 single-pole, double-throw (spdt) analog switch. improved speci- fications include a low maximum on resistance of 10 ohms and fast switching times (t on = 15ns max., t off = 7ns max.) with 5v supply operation. with a 2.5v supply, resistance is a low 40 ohms max. specifications are given for 2.5v, 3.3v and 5v power supply opera- tion. operating voltage range is 2.0v to 6.0v. to minimize pc board area use, the PI5A4599A is available in a compact 6-pin sc70 package. operating temperature range is ? 40c to 85c. PI5A4599A sot iny ? low resistance, low-voltage single-supply spdt switch features ? low on-resistance: 10 ohms max. ?r on matching: 2 ohms max. ?r on flatness: 3.5 ohms max. ? low 0.5na input leakage at 25 c ? 2v to 6v single-supply operation ? fast switching time - 15ns t on - 7ns t off ? break-before-make switching guaranteed ? 5pc max charge injection ? 225mhz channel bandwidth ? 76db off-isolation at 1mhz ? ttl/cmos logic compatible ? low power consumption: 5w ? improved direct replacement for max4599 ? packages available: ? 6-pin small compact sc70 applications ? communication circuits ? cellular phones ? audio and video signal routing ? portable battery-operated equipment ? data acquisition systems ? computer peripherals ? telecommunications ? relay replacement ? wireless terminals and peripherals a 9 9 5 4 a 5 i p c i g o lc no n 0n of f o 1f f on o functional diagram, pin configuration switches shown for logic ?0? input 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 top view PI5A4599A in 2 3 1 v+ gnd sc70-6 nc no com 5 6 4 truth tables
2 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch caution : stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. absolute maximum ratings voltages referenced to gnd v+ ........................................................................... ?0.5v to +7v v in , v com , v nc , v no (note 1) ...................... ?0.5v to v cc +2v or 30ma, whichever occurs first current (any terminal) ..................................................... 30ma peak current, com, no, nc (pulsed at 1ms, 10% duty cycle) ..................................... 30ma note: 1. signals on nc, no, com, or in exceeding v+ or gnd are clamped by internal diodes. limit forward diode current to 30ma. thermal information continuous power dissipation sc70-6 (derate 3.1mw/oc above +70oc) ............................. 245mw storage temperature ......................................... ?65oc to +150oc lead temperature (soldering, 10s) .................................. +300oc electrical specifications - single +5v supply (v+ = +5v 10%, gnd = 0v, v inh = 2.4v, v inl = 0.8v) r e t e m a r a pl o b m y ss n o i t i d n o c. p m e t ) c ( . n i m ) 1 ( . p y t ) 2 ( . x a m ) 1 ( s t i n u h c t i w s g o l a n a e g n a r l a n g i s g o l a n a ) 3 ( v g o l a n a l l u f0 v+v e c n a t s i s e r n or n o i , v 5 . 4 = + v m o c , a m 0 3 - = v o n v r o c n v 5 . 2 + = 5 278 m h o l l u f0 1 h c t a m e c n a t s i s e r - n o s l e n n a h c n e e w t e b ) 4 ( d r n o 5 21 . 05 . 0 l l u f1 e c n a t s i s e r - n o s s e n t a l f ) 5 ( r ) n o ( t a l f , v 5 = + v i m o c , a m 0 3 - = v o n v r o c n v 4 , v 5 . 2 , v 1 = 5 22 7 . 25 . 3 l l u f4 f f o c n r o o n t n e r r u c e g a k a e l ) 6 ( i ) f f o ( o n r o i ) f f o ( c n v , v 5 . 5 = + v m o c , v 0 = v o n v r o c n v 5 . 4 = 5 25 . 0 ?8 1 . 05 . 0 a n l l u f5 ?5 e g a k a e l f f o m o c t n e r r u c ) 6 ( i ) f f o ( m o c , v 5 . 5 = + v v m o c v , v 5 . 4 + = o n r o v c n v 0 = 5 20 . 1 ?0 2 . 00 . 1 l l u f0 1 ?0 1 e g a k a e l n o m o c t n e r r u c ) 6 ( i ) n o ( m o c v , v 5 . 5 = + v m o c v 5 . 4 + = v o n v r o c n v 5 . 4 + = 5 20 . 1 ?0 2 . 00 . 1 l l u f0 10 1
3 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch electrical specifications - single +5v supply (continued) (v+ = + 5v 10%, gnd = 0v, v inh = 2.4v, v inl = 0.8v) notes: 1. the algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design. 4. d r on = r on max. - r on min. 5. flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oc. 7. off isolation = 20log 10 [ v com / (v no or v nc ) ]. see figure 3. 8. between any two switches. see figure 4. r e t e m a r a pl o b m y ss n o i t i d n o cp m e t ) c o ( . n i m ) 1 ( . p y t ) 2 ( . x a m ) 1 ( s t i n u t u p n i c i g o l e g a t l o v h g i h t u p n iv h i l e v e l h g i h c i g o l d e e t n a r a u g l l u f 2 v e g a t l o v w o l t u p n iv l i l e v e l w o l c i g o l d e e t n a r a u g8 . 0 h g i h e g a t l o v h t i w t n e r r u c t u p n ii h n i v n i v 8 . 0 = s r e h t o l l a , v 4 . 2 =1 ?5 0 0 . 01 m a w o l e g a t l o v h t i w t n e r r u c t u p n ii l n i v n i v 4 . 2 = s r e h t o l l a , v 8 . 0 =1 ?5 0 0 . 01 c i m a n y d e m i t n o - n r u tt n o v c c 1 e r u g i f , v 5 = 5 275 1 s n l l u f0 2 e m i t f f o - n r u tt f f o 5 217 l l u f0 1 e k a m - e r o f e b - k a e r bt m b b 3 e r u g i f 5 20 1 l l u f5 n o i t c e j n i e g r a h c ) 3 ( q c l v , f n 1 = n e g , v 0 = r n e g 2 e r u g i f , m h o 0 = 5 25 . 15c p n o i t a l o s i f f or r i o r l c , s m h o 0 5 = l , f p 5 = 4 e r u g i f , z h m 1 = f 0 8 b d k l a t s s o r c ) 8 ( x k l a t r l c , s m h o 0 5 = l , f p 5 = 5 e r u g i f , z h m 1 = f 0 8 e c n a t i c a p a c o n r o c nc ) f f o ( 6 e r u g i f , z h m 1 = f 0 . 5 f p e c n a t i c a p a c f f o m o cc ) f f o ( m o c 0 . 5 e c n a t i c a p a c n o m o cc ) n o ( m o c 7 e r u g i f , z h m 1 = f3 1 h t d i w d n a b b d 3 ?w br l 8 e r u g i f , s m h o 0 5 =l l u f0 0 3z h m y l p p u s e g n a r y l p p u s - r e w o p+ v l l u f 26v t n e r r u c y l p p u s e v t i s o p+ iv c c v , v 5 . 5 = n i + v r o v 0 =1a
4 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch r e t e m a r a pl o b m y ss n o i t i d n o cp m e t.) c o (n i m. ) 1 ( p y t. ) 2 ( x a m. ) 1 ( s t i n u h c t i w s g o l a n a e g n a r l a n g i s g o l a n a ) 3 ( v g o l a n a 0+ vv e c n a t s i s e r - n or n o i , v 3 = + v m o c , a m 0 3 ? = v o n v r o c n v 5 . 1 = 5 22 10 . 4 1 w l l u f7 1 h c t a m e c n a t s i s e r - n o s l e n n a h c n e e w t e b ) 4 ( i , v 3 . 3 = + v m o c , a m 0 3 ? = v o n v r o c n v 5 . 2 , v 8 . 0 = 5 22 . 05 . 0 l l u f1 e c n a t s i s e r - n o s s e n t a l f ) 5 , 3 ( r ) n o ( t a l f 5 25 . 04 l l u f5 c i m a n y d e m i t n o - n r u tt n o v , v 3 . 3 = + v o n v r o c n 1 e r u g i f , v 5 . 1 = 5 25 15 2 s n l l u f0 4 e m i t f f o - n r u tt f f o 5 25 . 12 1 l l u f0 2 e k a m - e r o f e b - k a e r bt m b b 3 e r u g i f 5 20 1 l l u f5 n o i t c e j n i e g r a h c ) 3 ( q c l v , f n 1 = n e g , v 0 = r n e g 2 e r u g i f , v 0 = 5 23 . 15c p y l p p u s t n e r r u c y l p p u s e v i t i s o p+ i v 6 . 3 = + v , v n i + v r o v 0 = f f o r o n o s l e n n a h c l l a l l u f1 m a t u p n i c i g o l e g a t l o v h g i h t u p n iv h i l e v e l h g i h c i g o l d e e t n a r a u gl l u f2 v e g a t l o v w o l t u p n iv l i l e v e l w o l c i g o l d e e t n a r a u gl l u f8 . 0 t n e r r u c h g i h t u p n ii h n i v n i v 8 . 0 = s r e h t o l l a , v 4 . 2 =l l u f1 ?1 m a t n e r r u c w o l t u p n ii l n i v n i v 4 . 2 = s r e h t o l l a , v 8 . 0 =l l u f?1 1 electrical specifications - single +3.3v supply (v+ = +3.3v 10%, gnd = 0v, v inh = 2.4v, v inl = 0.8v) notes: 1. the algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design. 4. d r on = r on max. - r on min. 5. flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oc. 7. off isolation = 20log 10 [ v com / (v no or v nc ) ]. see figure 4. 8. between any two switches. see figure 5.
5 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch r e t e m a r a pl o b m y ss n o i t i d n o cp m e t.) c o (n i m. ) 1 ( p y t. ) 2 ( x a m. ) 1 ( s t i n u h c t i w s g o l a n a e g n a r l a n g i s g o l a n a ) 3 ( v g o l a n a 0+ vv e c n a t s i s e r - n or n o i , v 5 . 2 = + v m o c , a m 0 3 ? = v o n v r o c n v 5 . 1 = 5 20 22 2 w l l u f6 2 h c t a m e c n a t s i s e r - n o s l e n n a h c n e e w t e b ) 4 ( d r n o i , v 5 . 2 = + v m o c , a m 0 3 ? = v o n v r o c n v 5 . 2 , v 8 . 0 = 5 23 . 05 . 0 l l u f1 e c n a t s i s e r - n o s s e n t a l f ) 5 , 3 ( r ) n o ( t a l f 5 25 . 05 l l u f6 c i m a n y d e m i t n o - n r u tt n o v , v 5 . 2 = + v o n v r o c n 1 e r u g i f , v 5 . 1 = 5 20 20 3 s n l l u f?5 4 e m i t f f o - n r u tt f f o 5 20 2 l l u f?0 3 e k a m - e r o f e b - k a e r bt m b b 3 e r u g i f 5 20 1 l l u f5 n o i t c e j n i e g r a h c ) 3 ( q c l v , f n 1 = n e g , v 0 = r n e g 2 e r u g i f , v 0 = 5 29 . 05c p y l p p u s t n e r r u c y l p p u s e v i t i s o p+ i v 5 . 2 = + v , v n i + v r o v 0 = f f o r o n o s l e n n a h c l l a l l u f1 m a t u p n i c i g o l e g a t l o v h g i h t u p n iv h i l e v e l h g i h c i g o l d e e t n a r a u gl l u f2 v e g a t l o v w o l t u p n iv l i l e v e l w o l c i g o l d e e t n a r a u gl l u f8 . 0 t n e r r u c h g i h t u p n ii h n i v n i v 8 . 0 = s r e h t o l l a , v 4 . 2 =l l u f1 ?1 m a t n e r r u c w o l t u p n ii l n i v n i v 4 . 2 = s r e h t o l l a , v 8 . 0 =l l u f?1 1 electrical specifications - single +2.5v supply (v+ = +2.5v 10%, gnd = 0v, v inh = 2.4v, v inl = 0.8v) notes: 1. the algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design. 4. d r on = r on max. - r on min. 5. flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oc. 7. off isolation = 20log 10 [ v com / (v no or v nc ) ]. see figure 4. 8. between any two switches. see figure 5.
6 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch test circuits/timing diagrams figure 1. switching time figure 2. charge injection d v out v out v out v gen logic input off off off on on in in com in gnd +5v .1f v+ nc no or off q = ( d v out )(c l ) c l 0.22nf v+ v+ no gnd or nc com +3v* logic input in t r <20ns t f <20ns v out = v no r l r l + r on () c l includes fixture and stray capacitance v out v out r l 1k w c l 35pf logic input waveforms inverted for switches that have opposite logic * 1.5v for 3.3v supply t off t on 90% 90% logic input switch output +3v 0v 0v 50% switch input figure 3. break-before-make interval v+ v+ nc gnd com +3v logic input in no c l includes fixture and stray capacitance v out r l 1k w c l 35pf logic input +3v 0 switch output (v out ) 50% 0.9xv out 0.9xv out t bbm
7 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch test circuits/timing diagrams (continued) figure 4. off isolation/on-channel bandwidth figure 6. channel-off capacitance figure 5. crosstalk figure 7. channel-on capacitance figure 8. bandwidth capacitance meter com in 10nf gnd f = 1 mhz nc +5v v+ 0v or 2.4v v+ gnd nc or no 10nf com +5v vo r g = 50 w r l 50 w v+ +5v analyzer in 10nf nc or no com1 0v or 2.4v gnd 50 w 50 w v+ +5v nc capacitance meter gnd com 10nf in 0v or 2.4v f = 1mhz analyzer signal generator 0dbm com 10nf gnd nc no in v cc v+ 50 w 50 w
8 ps8553 08/10/01 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI5A4599A sot iny ? low resistance, low -voltage single-supply spdt switch pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com ordering information r e b m u n t r a pe g a k c a pk r a m p o t e g a k c a p x c a 9 9 5 4 a 5 i p6 - 0 7 c s3 6 a 6-pin sc70 (c) package 5 64 2 13 notes: 1) controlling dimensions in millimeters 2) ref: jedec mo-203ab
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